In an electronic apparatus mounted with a DRAM, there are cases where noise generated by the DRAM exerts an influence on the performance of the electronic apparatus. Various techniques are disclosed that are directed to a reduction of the influence of such noise. For example, Patent Literature 1 discloses a semiconductor storage device that has a plurality of DRAM memory sections and in which timings of refreshing operations are shifted from one another in the respective DRAM memory sections. In the semiconductor storage device, suppression is achieved of power supply noise caused by the refreshing operation, by shifting the timings of the refreshing operations from one another.